The present invention relates to a method to speed up the training of the output frequency signal (Out) of a frequency synthesizer circuit. The invention also relates to a shift oscillator in a radiotelephone utilizing the inventive method.
It is known to use a shift oscillator in a radiotelephone to generate a suitable shift frequency (e.g. 90 MHz) signal which is mixed with the local oscillator frequency (e.g. 945 MHz) signal of the receiver in order to generate a transmitter frequency (e.g. 855 MHz) signal. The relatively low frequency payload signal to be transmitted is mixed with the shift frequency signal.
The shift oscillator must meet conflicting requirements. On one hand it should be able to rapidly produce the predetermined fixed frequency output signal so that the radiotelephone rapidly is ready for transmission after start-up, for instance. On the other hand the frequency synthesizer of the shift oscillator should include a relatively slow phase locked loop in order to provide a good modulation response at low frequencies of the payload signal.
In prior art shift oscillators different approaches are used to meet these requirements. If the conflicting requirements are not too stringent, then it is possible to design a compromise. In order to meet more stringent requirements it is necessary to devise e.g. extra switching means which direct a "start-up signal" to the voltage controlled oscillator in order to shorten the training time, i.e. the time which the oscillator needs to reach a stable state. To realize a switchable start-up mode also other methods are conceivable,,which switch some control signals directed to the shift oscillator.